000 00775nam a2200229 a 4500
001 1624
003 BD-DhUET
008 980929s1999 maua b 001 0 eng
020 _a0792383931
040 _aDLC
_cDLC
_dBD-DhUET
082 0 0 _a623.95
_bSHE/1999
100 _aSherwani, Naveed A.
245 1 0 _aAlgorithms for VLSI physical design automation
_cby Naveed A. Sherwani.
250 _a3rd ed.
260 _aBoston :
_bKluwer Academic Publishers,
_c1999.
300 _axxx, 572 p. :
_bill. ;
_c24 cm.
504 _aIncludes bibliographies
650 0 _aIntegrated circuits-Very large scale integration
942 _cGB
856 4 2 _uhttp://www.loc.gov/catdir/enhancements/fy0820/98044779-d.html
856 4 1 _uhttp://www.loc.gov/catdir/enhancements/fy0820/98044779-t.html
999 _c1624
_d1624