000 00541nam a22001577a 4500
003 BD-DhUET
008 200315b xxu||||| |||| 00| 0 eng d
040 _c0
_dBD-DhUET
100 _aFaizul Bari, Md.
245 _aDesign optimization of processvariation tolerant spoof surface plasmon polariton interconnect for chip-to-chip communication
260 _aDhaka
_bDepartment of Electrical and Electronic Engineering, BUET
_c2020
300 _axi, 66 p.
501 _aOne CD-ROM
504 _aIncludes bibliographies
942 _cTH
999 _c42272
_d42272