DSpace Repository

Self-Consistent calculation of direct tunneling gate leakage current in deep submicron n- and p-MOSFETs in presence of inelastic scattering

Show simple item record

dc.contributor.advisor Anisul Haque, Dr.
dc.contributor.author Khairul Alam
dc.date.accessioned 2015-11-03T05:52:45Z
dc.date.available 2015-11-03T05:52:45Z
dc.date.issued 2002-03
dc.identifier.uri http://lib.buet.ac.bd:8080/xmlui/handle/123456789/1073
dc.description.abstract Direct. tunneling gate leakage current in both n- and p-MOS devices with ultra-thin gate-oxide is studied. The effects of inelastic scattering of the inversion carriers, tunneled into the gate-oxide region, on the direct tunneling gate current are investigated. Coupled Schrodinger's and Poisson's equations are solved self-consistently.' Open boundary conditions, taking into account the wave function tail inside the gate-oxide region, are used to solve Schrodinger's equation within the self-consistent loop. Also, the fraction of inversion charges inside the gate-oxide region is taken into account in the solution of Poisson's equation. Inelastic scattering is represented by a collision time which appears as an imaginary potential in S~hrodinger's equation. Simulated direct tunneling currents are compared with published experimental results. Inelastic scattering effects on direct tunneling current are found to be significant in devices with oxide thickness::::: 2 nm and at lower gate voltages. Therefore, the existing mismatch at, lower gate voltages between experimental and simulated direct t,unneling gate currents cim be explained in terms of inelastic scattering effects. However, for accurate modeling of direct tunneling current, appropriate spatial and gate bias dependence of collision time needs to be taken into account. It is also found that carrier effective mass in gate-oxide region is not a constant, rather a function of the applied / . gate bias. Moreover, electron and hole effective masses in gate-oxide region show opposite ,dependence on gate bias. Physical reasons for this behaviour are not yet known. Since the same expression of spatial and gate bias dependent collision time accurately simulates the direct tunneling gate current in both n- and p-MOSFETs, we believe that our empirical expression contains. the essential physics of inelastic trap scattering. The contribution of split-off holes to direct tunneling gate current in p-MOSFETs, particularly at higher gate voltages, is not negligible. Consequently this contribution should not be neglected as done in some recent studies. en_US
dc.language.iso en en_US
dc.publisher Department of Electrical and Electronic Engineering en_US
dc.subject Direct tunneling gate leakage current en_US
dc.subject Deep submicron n- and p-MOSFETs en_US
dc.title Self-Consistent calculation of direct tunneling gate leakage current in deep submicron n- and p-MOSFETs in presence of inelastic scattering en_US
dc.type Thesis-MSc en_US
dc.contributor.id 040006244 F en_US
dc.identifier.accessionNumber 96108
dc.contributor.callno 623.81528/KHA/2002 en_US


Files in this item

This item appears in the following Collection(s)

Show simple item record

Search BUET IR


Advanced Search

Browse

My Account