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Computer aided procedure for determination of states of digital logic circuits around overlapped transitional inputs
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| dc.contributor.advisor | Rahman, Dr. Md. Mujibur | |
| dc.contributor.author | Poddar, Sanjay Kumar | |
| dc.date.accessioned | 2016-03-09T06:52:59Z | |
| dc.date.available | 2016-03-09T06:52:59Z | |
| dc.date.issued | 1985-07 | |
| dc.identifier.uri | http://lib.buet.ac.bd:8080/xmlui/handle/123456789/2500 | |
| dc.description.abstract | For abstracts please see full text | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Department of Computer Science and Engineering, BUET | en_US |
| dc.subject | State - Digital logic - Circuit - Overlapped - Transitional - Input | en_US |
| dc.title | Computer aided procedure for determination of states of digital logic circuits around overlapped transitional inputs | en_US |
| dc.type | Thesis-MSc | en_US |
| dc.identifier.accessionNumber | 64096 | |
| dc.contributor.callno | 603.81958/POD/1985 | en_US |
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Dissertation/Theses - Department of Computer Science and Engineering
Post graduate dissertations (Thesis) of Computer Science Engineering (CSE)