Design and anlaysis of a RF front end low noise amplifier based on IBM 0.13μm CMOS technology

Abstract

Design and analysis of a RF front end low noise amplifier (LNA) is presented here. The RF front end LNA is designed for 15-22GHz of K-band and Ku-band. The designed LNA can be used for short distance communication like on-chip wireless communication as well as in data communication. The proposed circuit of LNA uses CS-CG topology with a three sections chebyshev filter at input, a coupling inductor in between diode connected MOS and main MOS and an inductive load at output. The proposed architecture uses inductively source degenerated topology and is designed in IBM 0.13μm CMOS process. The simulation is done both in Hspice RF and Cadence Spectre. Response of the input network is observed from Hspice and parameters values are selected. Coupling inductor is used to compensate the effect of the parasitic capacitances (gate-drain capacitance of main MOS, gate-source capacitance of diode connected MOS) and finally to increase the bandwidth. The proposed design shows a forward gain of 10.14dB at center frequency 17.56GHz with a -3dB bandwidth of 6.2GHz. The input and output reflection co-efficient are below -10dB within the band of interest. The output matching parameter is -25dB at center frequency. The circuit shows average noise figure of 3.74dB. Linearity of the circuit is also simulated and IIP3 and 1-dB compression point found -5dBm and -9.38dBm respectively. All the transistors are biased within the circuit and by the same supply source. The overall power consumption including bias circuit is 10.91mW when powered up by a 1.2V source.