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Design of an easily testable architecture for signed and unsigned multiplication
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| dc.contributor.advisor | Mahfuzul Aziz, Dr. Syed | |
| dc.contributor.author | Zahidur Rouf | |
| dc.date.accessioned | 2016-06-21T04:22:28Z | |
| dc.date.available | 2016-06-21T04:22:28Z | |
| dc.date.issued | 1996-12 | |
| dc.identifier.uri | http://lib.buet.ac.bd:8080/xmlui/handle/123456789/3310 | |
| dc.description.abstract | For abstracts please see full text | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Department of Electrical and Electronic Engineering, BUET | en_US |
| dc.subject | Design - Easily - Testable - Architecture - Signed - Unsigned - Multiplication | en_US |
| dc.title | Design of an easily testable architecture for signed and unsigned multiplication | en_US |
| dc.type | Thesis-MSc | en_US |
| dc.contributor.id | 930659 P | en_US |
| dc.identifier.accessionNumber | 90678 | |
| dc.contributor.callno | 623.92/ZAH/1996 | en_US |
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Dissertation/Theses - Department of Electrical and Electronic Engineering
Post graduate dissertations (Thesis) of Electrical and Electronic Engineering (EEE)