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Capacitance - voltage characteristics of partially depleted four gate transistor under different gate bias conditions
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| dc.contributor.advisor | Khosru, Dr. Quazi Deen Mohd. | |
| dc.contributor.author | Somaia Sarwat Sylvia | |
| dc.date.accessioned | 2016-06-28T03:27:37Z | |
| dc.date.available | 2016-06-28T03:27:37Z | |
| dc.date.issued | 2009-08-19 | |
| dc.identifier.uri | http://lib.buet.ac.bd:8080/xmlui/handle/123456789/3390 | |
| dc.description.abstract | For abstracts please see full text | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Department of Electrical and Electronic Engineering, BUET | en_US |
| dc.subject | MOSFET | en_US |
| dc.title | Capacitance - voltage characteristics of partially depleted four gate transistor under different gate bias conditions | en_US |
| dc.type | Thesis-MSc | en_US |
| dc.contributor.id | 100706206 p | en_US |
| dc.identifier.accessionNumber | 107319 | |
| dc.contributor.callno | 623.9732/SOM/2009 | en_US |
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Dissertations/Theses - Department of Electrical and Electronic Engineering
Post graduate dissertations (Theses) of Electrical and Electronic Engineering (EEE)