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Simulation based comparative analysis of performance limits of high mobility MOSFETS of alternate structures

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dc.contributor.advisor Khosru, Dr. Quazi Deen Mohd.
dc.contributor.author Mahmudur Rahman Siddiqui
dc.date.accessioned 2016-07-23T04:28:16Z
dc.date.available 2016-07-23T04:28:16Z
dc.date.issued 2011-07
dc.identifier.uri http://lib.buet.ac.bd:8080/xmlui/handle/123456789/3469
dc.description.abstract After dominating the the semiconductor logic industry for decades the reign of Si is coming to an end. Aggressive scaling of MOSFETs have pushed Si towards its physical performance limits. By the end of this decade the Si MOSFETs will reach their theoretical limits. To continue the scaling of logic devices and improve performance of integrated circuits researchers must find a suitable replacement for Si. To meet the high current demands the replacement must have high carrier mobility. III-V semiconductors appear as perfect candidates for nMOS materials as they have very high electron mobility. But there are many possible III-V materials. Also the aggressive scaling of Si has given birth to some very innovative structures which solves very critical problems of nano-scale fabrication. Few of such innovative structures are Double gate MOSFETs, Semiconductor On Insulator MOSFETs, FinFETs etc. These structures might be utilized to achieve further performance enhancement of the III-V based MOSFETs. Researchers all around the world are searching for the best possible alternative using III-V materials. But fabrication of III-V materials pose some difficult challenges. One such challenge is the gate dielectric. The III-V materials do not have aa natural oxide dielectric like Si and thus growth of a dielectric with acceptable interface quality is very difficult and perfecting one process is time and resource consuming. A theoretical study of all the possible options of III-V MOSFETs will shed some light on how to choose the most optimum path of device development and ensure perfect utilization of resources and time. Thus theoretical evaluation of different performance markers of a MOSFET using III-V material has become very important. There are several performance markers for a MOSFET. The On current denotes the current driving capability of a MOSFET which in turn decides the speed of a logic circuit. The subthreshold swing decides the power loss of a MOSFET. The on/off current ratio also is a performance parameter of a MOSFET. As integrated circuits are being shrunk down the speed of a transistor needs to increase while the power consumption must decrease. Thus a systemic study of the On current of a MOSFET will provide the engineers with one basis of selection or even lead to early elimination of some device structure that will not be able to sustain performance improvement in the long run without wasting valuable time and resources. In this study a comparative picture of the transistor On current for four different structures utilizing five different III-V semiconductor is presented. The calculation has taken into account the quantum mechanical effects active at the operating device dimensions. Only the limiting current is considered here and all imperfections are ignored as the objective is to draw a comparative picture of the ultimate performances of these devices. en_US
dc.language.iso en en_US
dc.publisher Department of Electrical and Electronic Engineering (EEE) en_US
dc.subject MOSFET en_US
dc.title Simulation based comparative analysis of performance limits of high mobility MOSFETS of alternate structures en_US
dc.type Thesis-MSc en_US
dc.contributor.id 0409062255 P en_US
dc.identifier.accessionNumber 109986
dc.contributor.callno 623.9732/MAH/2011 en_US


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