Ultra wideband receiver design for on-chip wireless interconnect

Abstract

The information revolution and upcoming era of silicon ultra large-scale integration (ULSI) have demanded an ever-increasing level of functional integration on single chip structure, driving a need for greater circuit density and higher performance. While traditional transistor scaling has thus far met this challenge, interconnect scaling has become the performance-limiting factor for new designs. In this thesis, we investigated the potentials of wireless on-chip interconnects system using for the future ULSI. It has been proposed, for the first time, transmitted reference (TR) Ultra Wideband (UWB) communication for intra-chip wireless interconnects system. This approach allows a straight-forward synchronization technique by giving proper delay to the reference pulse and thus avoids complicated intra-chip channel estimation for the detection unit. Therefore it results a simplified transceiver architecture. Moreover TR technique provides excellent multiple access capabilities to implement software reconfigurable wireless channel. The system performance has been investigated under a new modulation scheme termed as PAM-PPM technique, which shows superior system performance over the conventional Biphase Modulation technique.