Abstract:
As MOSFET device dimensions are shrinking to get optimum device performance, device
structure is being modified. Additional atoms have been doped laterally by ion implantation at
the source and drain sides. These additional doping atoms are known as pocket atoms that
cause threshold voltage to rise when the gate length is reduced. This effect is known as
reverse short channel effect or RSCE. This thesis presents the analytical models of the pocket
implanted n-MOSFET. Two linear equations are used to simulate the pocket profiles along
the channel at the surface from the source and drain edges towards the center of the n-
MOSFET. Then the effective doping concentration is derived by integrating the pocket
profiles from source to drain side and is used in the Poisson's equation in the depletion region
at the surface. From this Poisson's equation, an analytical surface potential model of the
pocket implanted n-MOSFET is derived using the appropriate boundary conditions. This
model is used to find the threshold voltage model incorporating the bias and temperature
effects. Then the inversion layer effective mobility model is also derived based on linear
pocket profiles. These models are used to derive the subthreshold drain current model of the
same device. Finally, low frequency drain current flicker noise model for the pocket
implanted nano scale n-MOSFET has been derived using the proposed threshold voltage
model.
After the model development, surface potential, threshold voltage, inversion layer effective
mobility, subthreshold drain current and low frequency drain current flicker noise models are
simulated by developing various MATLAB programs for different device and pocket profile
parameters as well as various bias conditions. The simulated results of the proposed models
are compared with the two other pocket profile models found in the literatures. The
comparison shows that the models obtained using the linear pocket doping profile also
produce similar results without hampering the accuracy level. Besides, the threshold voltages
for various gate lengths fit well with the experimental data already published in the literatures.
Not only that subthreshold drain current as well as low frequency drain current flicker noise
models also fit well with the experimental data published in the literatures for the similar
device and pocket profile parameters as well as bias conditions. In fact, these models possess
a simple compact form that can be utilized to study and characterize the pocket implanted n-
MOSFET in the nano scale regime.
