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Drain current modeling of double gate uniaxially strained silicon MOSFET

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dc.contributor.advisor Khosru, Dr. Quazi Deen Mohd.
dc.contributor.author Nasir Uddin Bhuyian, Md.
dc.date.accessioned 2016-08-09T07:02:00Z
dc.date.available 2016-08-09T07:02:00Z
dc.date.issued 2011-08
dc.identifier.uri http://lib.buet.ac.bd:8080/xmlui/handle/123456789/3620
dc.description.abstract An accurate model to simulate drain current versus gate voltage characteristics is developed for double gate MOSFET and a drain current model is proposed for double gate uniaxially strained silicon MOSFET. The model can accurately account short channel effect and quantum mechanical effect. Effects of uniaxial strain in <110> direction are taken in the model by incorporating the changes in band structure and effective masses of electrons properly. To enhance electron mobility effectively tensile strain is applied in <110> direction. An accurate mobility model is used and enhancement in mobility due to applied strain is accounted. Comparison with universal mobility is also included. Finally velocity saturation effect and channel length modulation are also included in the model. Ids-Vgs characteristics are simulated for both high and low drain bias. Comparison with reported experimental data for relaxed silicon DG MOSFET is provided. Percentage change in drain current due to applied strain is presented. From simulated results it is observed that, strain causes significant amount of changes in the drain current by enhancing electron mobility. In this work stress is given up to 5 GPa, which is the practical limit for uniaxial stress. Mobility change due to strain is shown to explain the effect of strain on drain current. Mobility is plotted as a function of effective field as well as gate voltage. It is found that, variation of effective mass due to strain is the dominant factor in improving drain current. It is also observed that percentage change in drain current due to strain is more above threshold voltage and it remains almost same for both high and low drain bias. en_US
dc.language.iso en en_US
dc.publisher Department of Electrical and Electronic Engineering (EEE) en_US
dc.subject MOSFET en_US
dc.title Drain current modeling of double gate uniaxially strained silicon MOSFET en_US
dc.type Thesis-MSc en_US
dc.contributor.id 100706207 P en_US
dc.identifier.accessionNumber 109990
dc.contributor.callno 623.9732/NAS/2011 en_US


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