dc.contributor.advisor |
Harun-ur-Rashid, Dr. A. B. M. |
|
dc.contributor.author |
Muzahidul Karim, Mohammad |
|
dc.date.accessioned |
2016-08-16T03:30:52Z |
|
dc.date.available |
2016-08-16T03:30:52Z |
|
dc.date.issued |
2001-06-26 |
|
dc.identifier.uri |
http://lib.buet.ac.bd:8080/xmlui/handle/123456789/3656 |
|
dc.description.abstract |
For abstracts please see full text |
en_US |
dc.language.iso |
en |
en_US |
dc.publisher |
Department of Electrical and Electronic Engineering, BUET |
en_US |
dc.subject |
Testability analysis |
en_US |
dc.subject |
Complementary pass |
en_US |
dc.subject |
Transistor logic circuit |
en_US |
dc.title |
Testability analysis of complementary pass transistor logic circuits |
en_US |
dc.type |
Thesis-MSc |
en_US |
dc.contributor.id |
9506235 F |
en_US |
dc.identifier.accessionNumber |
95412 |
|
dc.contributor.callno |
623.81530422/MUZ/2001 |
en_US |