Development of an FPGA based low power message displaying system using scanning technique

Abstract

Power efficient solution is an essential criteria for any portable electronic system. Electronic display is now the most conventional means of presenting information all over the world. Due to its attractive brightness and simple operability, Seven Segment Display is one of the most popular medium of presenting different types of information to the mass people. The display elements in an embedded system usually consume the major portion of the total power required to run the whole system. When large amount of display elements are used, power dissipation issue becomes more acute. A microcontroller based system using scanning technique for low power message display was developed by other researcher. The system was burdened with many limitations such as physical security, no. of pins, portability and slow processing speed. To overcome the limitations an FPGA based embedded system implementing scanning technique is proposed in this project. The FPGA based intelligent controller scans all the display elements continuously at a certain speed to ensure only one display unit is ‘ON’ and others are ‘OFF' at a given time but human eye cannot detect it due to speedy scanning of the controller. Here an FPGA based embedded system for ‘Muslim Calendar’ containing date, time and prayer times for five salat has been developed using 30 seven segment display units. Experimental result shows that dynamic scanning makes the current consumption 88% less and power requirement 82% less than that of the static display. It also shows that the proposed FPGA based system consumes 55% less current and 22% less power than the previous microcontroller based system. The same scanning technique can also be applied to drive the display system in other applications.