Abstract:
In recent years, researchers have been working on Graphene and Monolayer Transition Metal Dichalcogenides like MoS2 and WSe2 to find the channel material for next generation ultimately scaled transistors. The absence of intrinsic band gap in Graphene sheet made researchers focus more on Dichalcogenides lately and as a result of that endeavor monolayer WSe2 based pFET has been fabricated. This experimental device with high band gap (1.6 eV) showed higher carrier mobility (250 cm2/Vs) than monolayer MoS2 based devices. In recent literature methods of n-type and p-type doping of monolayer WSe2 FET have been demonstrated, which led to the fabrication of high performance CMOS inverter solely based on monolayer WSe2 channel. Despite of these promising experimental results, rigorous Transport and Electrostatic study of monolayer WSe2 based FET is yet to appear in the literature. Moreover, at present no analytical model for current-voltage characteristics is available specifically for WSe2 FET. The purpose of this work is to perform a simulation study of Quantum Mechanical electrostatics by solving Schrödinger-Poisson equations self-consistently using material parameters extracted from literature and to determine the transport characteristics using Fast Uncoupled Mode Space (FUMS) approach. The second objective of this work is to develop a compact Transport model for Monolayer WSe2 FET. In this thesis work both objectives have been fulfilled and a fully numerical device simulator and a compact analytical transport model have been demonstrated. The numerical simulator has been used to study the transport performance of a monolayer WSe2 FET structure with 20 nm of channel length. The performance analysis revealed excellent on and off state performances of the device with an impressive ON/OFF current ratio of 1010, on current of 467.2 μA/μm, effective mobility of 300 cm2/V.s, and SS of 77.72 mV/dec. The proposed device also demonstrated promising resistance to Short Channel Effects (SCEs) with a Drain Induced Barrier Lowering (DIBL) of 14.91 mV/V and a threshold voltage roll-off of 0.05 V for 0.7 V change in drain voltage. The compact analytical model developed in this work successfully tracks the transport characteristics of the monolayer WSe2 device as well. The model estimates the inversion charge distribution in the channel and calculates the drain current using the drift-diffusion transport equation. To simplify the analytical expression, the model also makes Gradual Channel Approximation and assumes that the electrostatic potential in the channel is limited to quadratic variations only. The model also uses a Field Dependent Mobility Model suggested by the ALTAS simulation framework and considers the E-K diagram obtained from the Density Functional Theory (DFT) to calculate the Density of States for monolayer WSe2. Results obtained from this physically accurate compact model are used for quick characterization of the proposed monolayer WSe2 channel transistor. With the help of a gate voltage dependent “Fitting Function”, this model successfully estimates the transport characteristics and threshold voltage of monolayer the WSe2 FET, which are in reasonable agreement with the numerical simulation.
