FPGA implementation of fault tollerent reversible contrast mapping technique

Abstract

In this era of Information and Communication Technology, copyright protection of digital content has become a burning issue due to rapid development in technology. Watermarking is one of the excellent choices for copyright protection problem. It is basically methods and technologies that hide information, for example a number or text, in digital media, such as images, video or audio. It has numerous applications such as copyright protection of digital media, authentication, certification, tamper detection of digital contents, etc. This research project focuses on text watermarking using Reversible Contrast Mapping (RCM) Reversible Watermarking (RW) technique since it offers superiority over all other existing digital watermarking technique in terms of high embedding rate at relatively low visual distortion (embedding distortion), low computation cost and ease of hardware realization. In this project, FPGA implementation of the RCM reversible technique is proposed to make the system fault tolerant. The proposed RCM RW system is designed and simulated in MATLAB environment. Two bench mark images have been watermarked using the proposed system. MATLAB simulation results on benchmark images ensure the accuracy of the functionality (embedding and decoding the original image) of the RCM RW system. One of the highlighting features of our system is that it is capable of embedding character into the digital media which is more user-friendly to the users in comparison with embedding bits. Performance of the proposed system in terms of accuracy, data embedding capability and image quality has been compared with that of other works which proves the superiority of our system over existing RCM RW techniques. Hardware architecture of the proposed system has been identified which can be realized in the future research.