Design and implementation of quadruple decimal logarithmic converter

Abstract

Nowadays, direct computation of decimal logarithm is getting much importance. There are a lot of applications such as for the measurement of pH, earthquake intensity, optical density in spectrometry and optics, brightness of stars in astronomy, ratio of voltage and power (called bel) in telecommunications, electronics and acoustics, etc., requires direct computation of decimal logarithm. So, microprocessor and microcontroller manufacturing companies implemented decimal encoded architecture in the processor (e.g., IBM's POWER6 microprocessor). Previously, in decimal logarithmic converters, decimal input is first converted to binary and then base-2 logarithm operations are performed and again results are converted back to decimal radix which introduces errors in the system due to the back and forth conversions of bases. To overcome this problem, a number of approaches have been proposed in the literature where digit-by-digit calculation based iterative approach has got popularity due to low power consumption of the system. State of the art researches have proposed using this approach for designing 32-bit and 64-bit logarithmic converter; however, there are many precision hungry applications, e.g., Tax calculation applications, scientific applications, etc., which requires highly precise logarithmic converter, for which precision is the main priority over the power consumption or circuit complexity or others performance matrix. This project proposes quadruple (128-bit) decimal logarithmic converter which is able to calculate decimal logarithmic value up to 34th digit of Mantissa value accurately. Main components of the Quadruple Precision Decimal Logarithmic Converter are master controller, power10 calculator, digit counter and shrinker modules. It has been designed using IEEE industry standard Verilog HDL. All the modules have been individually simulated using ModelSim software and their proper functionality was tested. Then, the modules have been integrated and simulated to ensure the desired functionality using a number of test set inputs. Each of the simulation result for each input has been compared with that of standard calculator’s output for the input which shows impressive accuracy. Finally the accuracy of the Quadruple Precision Decimal Logarithmic Converter has been compared with that of other researchers which shows its superior performance in terms of precision.