Abstract:
In this thesis, electrostatic and transport characteristics of n-channel Gate-all-around Junctionless Nanowire Transistor (GAA-JNT) and their interrelations have been studied. GAA-JNT is a novel electronic device, which operates similarly as a traditional FET device despite containing no distinct p-n junction in its structure. The device contains a doped semiconductor channel region surrounded by poly gate structures, separated by an oxide layer. As gate voltage is increased, the induced depletion region reduces, and as voltage exceeds threshold, the channel conductance commences. For voltage over flat-band, the device operation switches from depletion to accumulation mode. The current-voltage characteristics of the device closely resemble that of MOSFET. The device, free from doping gradient optimization constraints, can support further scaling down of the device structure than traditional FETs. The device also exhibits better non-ideal short channel and subthreshold characteristics, along with superior high temperature operations. In the course of the study, self-consistent analysis of coupled Schrödinger-Poisson equations via COMSOL assisted MATLAB simulations of various GAA-JNT device characteristics has been performed. Comparative study of GaN Nanowire FET with Si Nanowire FET with variation of different fabrication parameters was the primary focus of the study. The variation of channel mobile charge concentration with variations in device dimensions and biasing voltages have been studied. The disparity of potential profile and charge density across the channel for various biasing conditions has also been observed. The gate capacitance and its voltage dependence were also studied. Drain current of the device under ballistic transport assumptions has also been evaluated and its dependence on various device parameters has been studied. In fine, transconductance and channel conductance of the device were measured, and their bias voltage dependence was studied. The evaluated values were found to be in complete coherence with both previously conducted intricate analyses of device properties as well as theoretical expectations.
