Modeling of drain current for graphene channel G4FET and gate-all-around MOSFET

dc.contributor.advisor	Rahman, Hamidur
dc.contributor.author	Rakibul Alam, Md.
dc.date.accessioned	2020-01-12T04:06:51Z
dc.date.available	2020-01-12T04:06:51Z
dc.date.issued	2018-12-01
dc.identifier.uri	http://lib.buet.ac.bd:8080/xmlui/handle/123456789/5448
dc.description.abstract	The structure of Graphene channel Four Gate Field Effect Transistor (G4-FET) and Gate-All-Around (GAA) MOSFET have been developed in 3D ATLAS simulator of SILVACO in this thesis. Drain current of Graphene channel G4-FET and GAA MOSFET are calculated and compared in this study. The performance of the devices has also been investigated in this article. An optimized structure is designed for the performance matrix such as threshold voltage, Subthreshold Swing (SS), Drain Induced Barrier Lowering (DIBL), transconductance etc. and the results are compared with existing FET structure in this paper.	en_US
dc.language.iso	en	en_US
dc.publisher	Department of Electrical and Electronic Engineering (EEE), BUET	en_US
dc.subject	MOSFET	en_US
dc.title	Modeling of drain current for graphene channel G4FET and gate-all-around MOSFET	en_US
dc.type	Thesis-MSc	en_US
dc.contributor.id	1015062260 F	en_US
dc.identifier.accessionNumber	117245
dc.contributor.callno	623.9732/RAK/2018	en_US