Surface Potential Based Analytical Modeling of Electrostatic and Transport Characteristics of GaN Junctionless Nanowire MOSFET

Abstract

Abstract Since tradition planar Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) has reached their scaling limit, further miniaturization, without degradation of device performance, has become very difficult due to sever short channel effect and high complexity of fabrication process resulted from ultra sharp source and drain junction requirement. Junctionless (JL) nanowire (NW) MOSFETs are considered promising for the sub-20 nm era due to their constant doping profile from source to drain. They provide a great scalability without the need for rigorously controlled doping and ac- tivation techniques as well as reduced short channel effects (SCEs) compared to the conventional MOSFETs. With its superior electronic properties compared to Si, GaN has shown its potential as a viable alternative of Si as a channel material in ultra scaled devices. Though a number of experimental studies for GaN JL NW MOSFET have been carried out over the past few years, rigorous and accurate analytical study of this device is yet to be reported. This work presents a physically based compre- hensive analytical investigation of electrostatic and transport phenomena of GaN JL NW MOSFET. The evolution of the proposed model involves the solution of quasi 2-D Poisson’s equation with appropriate boundary condition to obtain effective surface po- tential as a function of gate voltage. The mobile carrier density derived from the surface potential is used to formulate the core transport model as well as to analyze the electro- static characteristics for various physical device parameters. Short channel effects and certain non-ideal effects including velocity saturation, mobility degradation, channel length modulation have been incorporated in the core transport model. The impact of physical device parameters including channel length, NW radius and oxide thickness on the performance metrics of the device such as subthreshold slope (SS), drain in- duced barrier lowering (DIBL) and threshold voltage has been rigorously investigated. Upon analyzing the transport properties of the device, steep SS of 68 mV/dec, DIBL of 27 mV/V and switching figure of merit Q(= gm/SS) of 0.16 (µS/µm/(mV/dec) have been attained which makes the GaN NW JL MOSFET a promising candidate for emerging low power application. The results of this work exhibit very good agreement with 3D TCAD simulation and reported experimental results and thereby enhancing the reliability of the proposed model.