Design optimization of processvariation tolerant spoof surface plasmon polariton interconnect for chip-to-chip communication (Record no. 42272)
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000 -LEADER | |
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fixed length control field | 00541nam a22001577a 4500 |
003 - CONTROL NUMBER IDENTIFIER | |
control field | BD-DhUET |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 200315b xxu||||| |||| 00| 0 eng d |
040 ## - CATALOGING SOURCE | |
Transcribing agency | 0 |
Modifying agency | BD-DhUET |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Faizul Bari, Md. |
245 ## - TITLE STATEMENT | |
Title | Design optimization of processvariation tolerant spoof surface plasmon polariton interconnect for chip-to-chip communication |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc. | Dhaka |
Name of publisher, distributor, etc. | Department of Electrical and Electronic Engineering, BUET |
Date of publication, distribution, etc. | 2020 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | xi, 66 p. |
501 ## - WITH NOTE | |
With note | One CD-ROM |
504 ## - BIBLIOGRAPHY, ETC. NOTE | |
Bibliography, etc | Includes bibliographies |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | Thesis |
No items available.